Not Applicable.
The present embodiments relate to fabricating semiconductor integrated circuits, and are more particularly directed to automatically determining the best focus for a wafer stepper for thereafter forming integrated circuits on semiconductor substrates.
Integrated circuits are immensely prevalent in all aspects of contemporary electronic technology. Indeed, vast resources are expended in developing and implementing integrated circuit technology in order to supply demands imposed by the consuming marketplace. In this regard, the efficient production of integrated circuits is critical, and the present embodiments are directed at such efficiency. Particularly, the present embodiments improve the efficiency for focusing a wafer stepper used to build integrated circuits on a semiconductor wafer or the like and, therefore, improve the entire process of integrated circuit formation. This as well as other benefits are explored later, but are first preceded by a discussion of the prior art.
By way of introduction, FIG. 1 illustrates a general view of various components of a patterning system 10, where system 10 is generally available in the prior art, but also may be improved using the best focus determination of the preferred embodiments discussed later. Before proceeding, note that system 10 is shown in a simplified format in that only various components are illustrated, or consolidated, in order to simplify the present discussion and to facilitate a greater understanding of the background of the preferred embodiments discussed later; thus, one skilled in the art will appreciate that system 10 may include various items in addition to, or in lieu of, those shown in FIG. 1. Turning then to the details of FIG. 1, system 10 includes a light source 12 disposed over a plate 14, where plate 14 is typically quartz and is or has been referred to in the art by various names such as a xe2x80x9creticlexe2x80x9d or a xe2x80x9cmask.xe2x80x9d For sake of convenience, therefore, plate 14 is hereafter referred to as reticle 14. Located below reticle 14 is a projection lens 16, which actually may include more than one lens and may cooperate with one or more mirrors (not shown). Looking to the bottom of FIG. 1, system 10 further includes a wafer support 18, which supports at least one wafer 20 so that its surface 20s is facing projection lens 16. A photoresist layer 22 may be placed on surface 20s. Lastly, system 10 includes a controller 29 which may include electronic control circuitry and apparatus, including computer control such as through a processor or the like, so that various control actions may be taken with respect to other items in system 10; by way of example, therefore, control arrows are shown from controller 29 to light source 12, reticle 14, projection lens 16, and wafer support 18.
A brief description of the operation of system 10 is now provided. Light source 12 is energized, such as by way of a control operation from controller 29, and in response it provides a light beam 24 to reticle 14. Although not expressly shown in FIG. 1, it is known in the art that portions of reticle 14 block the passage of light while other portions of reticle 14 allow light to pass through it, thereby providing a light image 26 toward projection lens 16. Projection lens 16 then focuses and projects light image 26 so that a projected image 28 is directed toward a particular location on photoresist layer 22 and corresponding to an underlying location of surface 20s of wafer 20. A particular location is sometimes referred to in the art as an exposure or field. Once projected image 28 impinges on surface 20s, and in combination with the effect of photoresist 22, a circuit image is formed, and it should be noted that this image may form directly on surface 20s or in some other layer that has been located on surface 20s (e.g., polysilicon, silicon dioxide, silicon nitride, glass, polyamide, metals or metal alloys). In any event, the circuit image includes either a circuit element or some other photographically imparted device features in surface 20s or a layer above that surface. Lastly, it is noted that this image is also sometimes referred to in the art as a pattern.
After the steps described above, wafer support 18 moves and thereby moves wafer 20, such as by way of a control operation from controller 29. Next, the steps described above are repeated, so once more light beam 24 passes through reticle 14 to produce a light image 26, and light image 26 passes through projection lens 16 to create a projected image 28 which impinges on a different location of photoresist layer 22 corresponding to a different underlying location on wafer 20. This repeated sequence is itself repeated numerous times so that numerous images (or patterns) are formed on a single wafer. Each image may be a portion of a single circuit or may represent multiple duplicate circuits on the wafer. Thus, system 10 essentially xe2x80x9cstepsxe2x80x9d from one image to the next and, hence, is often referred to in the art as a xe2x80x9cstepper.xe2x80x9d
Having now described system 10 in structure and its operation, attention is turned to issues of image beam focus, as that concept is particularly relevant to the preferred embodiments described later. In particular, since system 10 comprises photolithographic aspects, then the vertical displacement lens 16 and wafer 20 defines the extent to which projected image 28 is properly focused on wafer 20 (or photoresist 22). As with most photolithographic processes, the better the focus, the better the resultant product. Thus, controller 29 further includes some type of focus control apparatus for adjusting the focus of projected image 28 with respect to wafer 20, such as by vertically moving projection lens 16 relative to wafer 20. As a basis for the amount of movement required, typically a sample wafer is first selected form a batch (or xe2x80x9clotxe2x80x9d) of wafers, and the sample wafer is used to determine an appropriate focus distance referred to as a xe2x80x9cbest focus,xe2x80x9d where examples of this determination are detailed below. This best focus distance is then used for the remaining wafers in the batch as each of those wafers is patterned using system 10. More particularly, for each of those wafers, the earlier-determined best focus is used with respect to system 10 to adjust projection lens to relative to wafer 20. Indeed, most commonly a focus correction is made prior to each exposure in an effort to obtain an optimal focus for the ensuing exposure.
A first prior art method for determining a best focus is now introduced, and explained in greater detail below in connection with the graph of FIG. 2a. In this method, a sample wafer is placed either in a given stepper system or a comparable system that is assumed to have a same focusing distance as the given stepper system, where the comparable system will be used to pattern other wafers from the same batch as the sample wafer. Next, a number of lines are patterned on the sample wafer, where different lines are patterned using different focus distances. A first distance is considered a baseline value which is established at what is anticipated as the best focus distance but, as detailed below, the result of the method may indicate that some offset distance should be added or subtracted from the baseline value to achieve the best focus for either the given system in which the sample wafer is patterned or in another system which is expected to be sufficiently comparable to the given system.
Turning to FIG. 2a, it illustrates measurements that are made of the critical dimension (xe2x80x9cCDxe2x80x9d) for the patterned lines formed on a sample wafer, where typically the CD is the width of the line and corresponding to the smallest width which will be required to form a part of a circuit element (e.g., a width of the gate of a transistor). The horizontal axis in FIG. 2a illustrates distance of focus (in microns), with a level of 0 set at what is introduced above as the baseline value (i.e., the initial value anticipated as the best focus distance for the stepper system). Thus, any distance away from the baseline level of 0 focus may be considered an extent of xe2x80x9cdefocus.xe2x80x9d The vertical dimension in FIG. 2a illustrates the CD of a line formed on the sample wafer for a given focus. The plot is defined by drawing lines between points plotted on the graph, where in the current example there are six points P1 through P6, each representing an example of a CD measurement as further detailed below.
Looking to some specific points in the plot, point P1 is the CD measurement for the line patterned on the sample wafer using the level 0 focus, where that line is measured to have a CD equal to 0.20 xcexcm. Another point P2 is illustrated where the stepper is adjusted to a focus that is 0.2 xcexcm in a first direction away from the level 0 focus and a line is formed on the wafer; this first direction may be considered positive relative to the level 0 focus and is shown in the plot at a defocus level of 0.2, and it corresponds to a CD measurement equal to 0.19 xcexcm. In a second opposite direction away from the level 0 focus, a point P3 is illustrated where the stepper is adjusted to a focus that is 0.2 xcexcm in a second direction away from the level 0 focus and a line is formed on the wafer; this second direction may be considered negative relative to the level 0 focus and is shown in the plot at a defocus level of xe2x88x920.2, and it corresponds to a CD measurement equal to 0.21 xcexcm. This process is repeated for a total of six points as shown, where the levels of focus and corresponding CD measurements for all six points are shown in the following Table 1:
FIG. 2b illustrates the same plot of FIG. 2a, and adds a window W for defining the best focus point for a selected value of CD, where the sides of window W are defined to occur where the plot intersects the selected value of CD. For example, FIG. 2b illustrates window W defined for a CD equal to 0.17 xcexcm and, thus, a dashed horizontal line is drawn at CD equal to 0.17 xcexcm. The right bound of window W occurs at P5 and, thus, occurs for a value of focus equal to 0.4. The left bound of window W occurs between P4 and P3; the value of focus at this intersection point therefore may be derived based by defining an equation representing the line between P4 and P3. Table 1 demonstrates that the slope between P4 and P3 equals 2.5. Accordingly, the equation of the line between P4 and P3 is shown in the following Equation 1:
CD=[(slope)*(focusxe2x88x92focus at P4)]+(CD at P4)=[(2.5)*(focus+0.4)]+0.16xe2x80x83xe2x80x83Equation 1
Equation 1 may be re-arranged to solve for the focus value between P4 and P3 and for CD equal to 0.17, as shown in the following Equation 2:
focus=[0.17xe2x88x920.16]/2.5xe2x88x920.4=0.04xe2x88x920.4=xe2x88x920.36xe2x80x83xe2x80x83Equation 2
Thus, Equation 2 demonstrates that the left bound of window W occurs for a value of focus equal to xe2x88x920.36.
Once the right and left bounds of window W are determined, the first prior art approach then examines the center point between those bounds and uses that center point as the best focus. In the current example, recall that that the right bound of window W occurs at a focus level equal to 0.4 and the left bound of window W occurs at a focus level of xe2x88x920.36. Thus, the center point between these bounds occurs at a focus value equal to 0.02. Accordingly, while the initial assumption was that the baseline level of 0 is the best focus distance for the given stepper system, the center point of the plot suggests instead that the best focus occurs at a positive distance 0.02 xcexcm from the level of 0. As a result, an offset value of 0.02 xcexcm relative to the baseline position is used to adjust the stepper focus for patterning the remaining wafers in the batch using that stepper.
While the first prior art method described above (or variants thereof) has proven effective in various circumstances, it also has drawbacks. For example, the method is considerably time consuming given the requirements repeated CD measurements. Moreover, using the center point of a plot is based on various assumptions regarding the curvature of the plot and, for a given wafer or system such assumptions may be questionable. Still further, the accuracy of the best focus determination is on the order of 0.1 xcexcm, which may be unacceptable for smaller CD implementations or based on other considerations.
A second prior art method for determining a best focus is now described and illustrated in part with reference to FIG. 3. In this method, once more a sample wafer is placed either in a given stepper system or a comparable system that is assumed to have a same focusing distance as the given stepper system, where such a system will be used to pattern other wafers from the same batch as the sample wafer. Here, a pattern is formed on the wafer as detailed below, and as now introduced using FIG. 3. Specifically, FIG. 3 shows a wafer 24 subdivided into many regions or frames as is known in the art, where each frame under normal fabrication represents an area where a circuit or duplicate circuits are formed during a single exposure. To the right of FIG. 3 a singe frame 24F1 is enlarged to further demonstrate the second prior art method for determining a best focus.
Looking to frame 24F1 in greater detail, the second prior art method for determining best focus uses a stepper to pattern a set of identically-shaped elements on from 24F1, where the elements are typically square in shape and are referred to in the art as xe2x80x9cdotsxe2x80x9d; accordingly, the designation D is used in FIG. 3 to identify various ones of the dots by way of example. Typically, each of dots D is on the order of 0.3 to 0.5 xcexcm in length and width. Thus, a first set of dots D are patterned on from 24F1 using the stepper at a baseline focus level. Although not shown in FIG. 3, numerous other sets of dots D are also patterned on other frames of wafer 24, where each different set is formed using different focus level. By way of example assume that the new focus level for a first group of sets other than the baseline set are formed at increments of 0.2 xcexcm in a first direction away from the baseline focus level (e.g., at +0.2 xcexcm, +0.4 xcexcm, +0.6 xcexcm and so forth relative to the baseline level). Assume further that the new focus level for a second group of sets other than the baseline set are formed at increments of 0.2 xcexcm in a second and opposite direction away form the baseline focus level (e.g., at xe2x88x920.2 xcexcm, xe2x88x920.4 xcexcm, xe2x88x920.6 xcexcm and so forth relative to the baseline level).
Once one or more sets of dots D are formed under the second prior art method, wafer 24 is analyzed manually by a person using a microscope where the person confirms that dots D were printed on wafer 24 according to the baseline level. Next, the person views, using the microscope, the sets of dots other than the baseline set and which were formed using the focus levels in the first direction. At some point while viewing the different sets of dots formed using the focus levels in the first direction, and due to the increase in the focus levels, dots D for a particular set are will no longer be viewable under the microscope. This point is referred to in the art as the point when dots D disappear. For this reason, this second method is also sometimes referred to in the art as a xe2x80x9cdisappearing dotsxe2x80x9d technique. In any event, the person records the stepper focus in the first direction corresponding to the set of dots D which disappeared under the microscope. Next, the person views, using the microscope, the sets of dots other than the baseline set and which were formed using the focus levels in the second direction. Once more, at some point while viewing the dots formed using the focus levels in the second direction dots D in a particular set will no longer be viewable under the microscope (i.e., they are said to disappear). When this point is detected, the person records the stepper focus in the second direction corresponding to the set of dots D which disappeared under the microscope. Given the two focus levels corresponding to disappearing dots in both the first direction of focus and the second direction of focus, the center point between those points is defined as the best focus for the stepper. As with the first prior art method, this best focus is then used as an offset to adjust the baseline focus of the stepper such as the stepper of system 10 in FIG. 1.
While the second prior art method described above (or variants thereof) also has proven effective in various circumstances, it too has drawbacks. For example, the method also is time consuming. As another example, the determination of when dots D disappear is subjective in the analysis of the person operating the microscope, and is also subject to human error. Most likely for these reasons, the accuracy of the best focus determination is on the order of 0.2 xcexcm, which may not be acceptable for certain integrated circuit implementations.
A third prior art method for determining a best focus is sometimes referred to in the art as an equal line space grating technique, and is now described and illustrated in part with reference to FIGS. 4a through 4d, where for simplicity each of these Figures shows a single corresponding frame of a wafer 26. Like the second method described above, this third method also prints test patterns on wafer 26 and those patterns are each manually examined using a microscope. However, the patterns are formed using a different technique and the examination is typically not fully to the level of a completely disappearing pattern. Turning first to the patterns, FIG. 4a illustrates a frame 26F1 where a pattern of symmetric elements is formed along a first line L1. Although not shown, each element E actually consists of a number of parallel thinner lines, where these lines are along the same dimension as line L1 (i.e., horizontal in the example of FIG. 4a). All elements E of line L1 are formed at a first baseline exposure level, but the focus level is increased from left to right along line L1. In addition to the formation of line L1, the stepper is moved to a greater exposure level, and a line L2 of elements is formed on a different frame 26F2 as shown in FIG. 4b, where again the focus level is increased from left to right along the line (i.e., L2 in this case). This process is typically repeated for numerous different lines of elements, where lines of elements are formed for exposure levels increasing from the baseline exposure level, and also for exposure levels decreasing from the baseline exposure level. By way of example, therefore, two additional frames 26F3 and 26F4 are shown in FIGS. 4c and 4d, respectively.
Once a number of different lines are formed, wafer 26 is analyzed manually by a person using a microscope where the person confirms they see a number of elements E in the case of the baseline focus, which recall is shown in line L1; thus, for the example of FIG. 4a, the person would confirm seeing a total of five elements. However, as to the additional lines, the number of visible elements will begin to decrease at some point in the direction of increasing exposure from the baseline exposure level and in the direction of decreasing exposure from the baseline exposure level. Thus, by way of example, FIGS. 4b through 4d illustrate an example of the view of lines in increasing exposure, while one skilled in the art will readily appreciate that a comparable result will occur for the lines of decreasing exposure. Looking then to FIG. 4b, only four elements are shown (i.e., are visible under the microscope) while it also should be appreciated that the change in number of elements may actually occur only after additional lines are formed. In any event, the above process of viewing the different lines is repeated until the number of visible elements reaches a predetermined and typically relatively small number (e.g., two). Thus, by way of example, FIGS. 4c and 4d illustrate lines L3 and L4, respectively, with it understood that line L3 is formed at a greater exposure than line L2, and line L4 is formed at a greater exposure than line L3. Moreover, the illustration is intended to depict the view of these lines under the microscope and, hence, note that fewer elements are visible when line L3 is examined, and still fewer are visible when line L4 is examined. When line L4 is examined and it is revealed that only two elements are visible, then the focus level of the right and left element are used as bounds, and the midpoint between those two focus levels is recorded. Similarly, although not shown in additional Figures, recall that lines are also formed on wafer 26 in decreasing levels of exposure from the baseline; thus, these lines are also microscopically examined until a line is found with the same relatively small number of elements used to constrain the focus level for the lines formed using increasing exposures. Once this additional line is identified, then again the focus levels of its right and left element are used as bounds, and the midpoint between those two focus levels is recorded. Given the two midpoints corresponding to the reduced number of elements in both the first direction of exposure and the second direction of exposure, the halfway point between those midpoints is defined as the best focus for the stepper and, therefore, is used to adjust the baseline of the stepper according to that best focus.
The third prior art method described above is also effective to a certain extent, but shares the same drawbacks as the second prior art method. For example, the method is time consuming. As another example, the determination is visual and, hence, subjective and subject to human error. In addition, the accuracy of the best focus determination is on the order of 0.2 xcexcm, which again may not be acceptable for certain implementations.
A fourth prior art method for determining a best focus is sometimes referred to in the art as a phase shifted reticle technique, and is now described and illustrated in part with reference to FIGS. 5a through 5d. This method also uses test patterns on a sample wafer, and here the wafer is labeled wafer 28 for purposes of reference. In this case, wafer 28 (or photoresist on wafer 28) is exposed to an element of light as well as a ninety degree phase shifted component of the light element. For example, and as shown in FIG. 5a, the light and its phase shifted element are directed to a first frame 28F1 of wafer 28 at a first focus level, thereby forming a main component M1 and a phase shifted element PSE1. Further, this exposure technique is repeated for additional focus levels as shown in FIGS. 5b through 5d and for different fields 28F2 through 28F4, respectively. For each repeated exposure, a different focus level is used which once more forms a main component M2 though M4, respectively, and a corresponding phase shifted element PSE2 through PSE4, respectively.
The fourth prior art method for determining a best focus value also makes a determination for each patterned field. In this case, a distance is determined between each main component and its corresponding phase shifted element More particularly, in the current art, a metrology tool is used, where such a tool is known in the integrated circuit layout art for purposes of ensuring proper overlay as further detailed later. At this point, note that a metrology tool provides an automated system for determining a center point of one or more patterns on a wafer, and also for measuring a distance between detected center points. For the sake of illustration, these center points are shown in FIGS. 5a through 5d; for example, in FIG. 5a, main component M1 has a center point CM1, and phase shifted element PSE1 has a center point CPSE1. With respect to these center points, it should be understood that they are shown in the illustration based on the symmetric nature of the patterns where the metrology tool should identify a center point, while in actuality no physical indication of the center point is visible on the pattern. Once the center points are identified for a given field, the metrology tool also measures the distance between those center points. These steps of identifying center points and measuring the distance between them is repeated for all fields 28F1 through 28F4. Thereafter, the distances are compared, and the focus used to form the pattern on the field having the shortest distance between a main component and its corresponding phase shifted element is determined to correspond to the best focus. In the example of FIGS. 5a through 5d, therefore, field 28F3 of FIG. 5c depicts the shortest distance between its main component and its corresponding phase shifted element. Accordingly, the focus level used to form main element M3 of field 28F3 is accepted as the best focus for the system.
The fourth prior art method described above provides some advantage over the other prior art approaches, but it too suffers some drawbacks. As one primary example, the fourth prior art method is only useful for certain exposure conditions. More particularly, the fourth prior art method is only applicable to so-called small sigma applications. In other words, it is known in the art that when two light beams come together there is resulting coherence and interference. Typically, for a small aperture, which corresponds to a small sigma, there is larger coherence and larger interference; conversely, for a larger aperture (i.e., large sigma), there is smaller coherence and smaller interference. Given these concepts, this fourth prior art method described above is only usable in the small sigma situation and, thus, does not provide a technique for large sigma applications.
Each of the above prior art techniques is implemented to ultimately generate multiple integrated circuits on a single wafer, and with the goal of doing so at an acceptably accurate level of focus. However, when focus is poor the resulting integrated circuits may be unusable or unstable devices and, thus, attention to focus issues is important for operability and production efficiency. Further, as integrated circuit device features continues to decrease in size, and as semiconductor product volume increases, there is a strong need to determine and maintain the best focus of a stepper such as system 10 and to characterize lens performance with high accuracy. Thus, while the prior art attempts to optimize focus, there are various drawbacks as set forth above, and the preferred embodiments endeavor to achieve improved or optimal focus and thereby to reduce or eliminate such drawbacks, as further discussed in detail below.
In the preferred embodiment, there is a method of determining a best focus for an integrated circuit stepper. The method repeats various steps for a plurality of different focus levels. The repeated steps include forming a first element group on a wafer, where the first element group comprises one or more elements and each of the one or more elements in the first element group has a shape. The repeated steps further include defining a first reference point for the first element group at a position relative to the shape of the one or more elements in the first element group. Similarly, the repeated steps include forming a second element group on the wafer, where the second group comprises one or more elements and each of the one or more elements in the second element group has a shape, and defining a second reference point for the second element group at a position relative to the shape of the one or more elements in the second element group. Still another repeated step is measuring a distance between the first reference point and the second reference point such that a distance measurement is identified for each of the plurality of different focus levels. Finally, the method selects as the best focus a focus level from the plurality of different focus levels and corresponding to a selected one of the distance measurements. Other apparatus, systems, and methods are also disclosed and claimed.